1. Field of the Invention
The invention relates to a sputter mask or stencil used to control deposition of material in a physical vapor deposition (PVD) system. More particularly, the invention relates to a method and apparatus for precise deposition of target material on the surface of a substrate support chuck using a PVD system to fabricate a wafer spacing mask.
2. Description of the Background Art
Substrate support chucks are widely used to support substrates within semiconductor processing systems. A particular type of chuck is a ceramic electrostatic chuck that is used in high-temperature semiconductor processing systems such as high-temperature physical vapor deposition (PVD). These chucks are used to retain semiconductor wafers, or other workpieces, in a stationary position during processing. Such electrostatic chucks contain one or more electrodes imbedded within a ceramic chuck body. The ceramic material is typically aluminum-nitride or alumina doped with a metal oxide such as titanium oxide (TiO.sub.2) or some other ceramic material with similar resistive properties. This form of ceramic is partially conductive at high temperatures.
In the traditional use of ceramic electrostatic chucks, a wafer rests flush against the surface of the chuck body as chucking voltage is applied to the electrodes. Because of the conductive nature of the ceramic material at high temperatures, the wafer is primarily retained against the ceramic support surface by the Johnsen-Rahbek effect. Such a chuck is disclosed in U.S. Pat. No. 5,117,121 issued May 26, 1992.
One disadvantage of using a chuck body fabricated from ceramic is that, during manufacture of the support, the ceramic material is "lapped" to produce a relatively smooth surface. Such lapping produces particles that adhere to the surface of the support. These particles are very difficult to completely remove from the surface. The lapping process may also fracture the surface of the chuck body. Consequently, as the chuck is used, particles are continuously produced by these fractures. Additionally, during wafer processing, the ceramic material can abrade an oxide coating or layer on the underside of the wafer resulting in further introduction of particulate contaminants to the process environment. During use of the chuck, the particles can adhere themselves to the underside of the wafer and be carried to other process chambers or cause defects in the circuitry fabricated upon the wafer. It has been found that tens of thousands of contaminant particles can adhere to the backside of a given wafer after retention upon a ceramic electrostatic chuck.
Similarly, substrate support chucks that are used in low-temperature processing (e.g., less than 300 degrees Celsius) may also produce contaminant particles that interfere with the wafer processing. Such low-temperature chucks include electrostatic chucks and mechanical clamping chucks which contain wafer support surfaces that are typically fabricated from dielectric materials such as alumina. These types of chucks have also been found to produce particular contaminants during use that can adhere to the underside of the wafer during processing.
To overcome the disadvantages associated with the workpiece substrate contacting the substrate support chuck, a wafer spacing mask is deposited upon the surface of the substrate support chuck. Such a wafer spacing mask is disclosed in U.S. Pat. No. 5,656,093 issued Aug. 12, 1997 to Burkhart et al. and herein incorporated by reference. The material deposited upon the support surface of the chuck body, i.e., the wafer spacing mask, is a metal such as titanium, titanium nitride, stainless steel and the like. other materials, including conductors, insulators and semiconductors, that have superior contact properties can also be used to fabricate the spacing mask. Additionally, a mask may comprise combinations of materials, e.g., a metallic layer supported by an insulator layer and the like. The material supports a semiconductor wafer in such a way that the surface of the wafer that faces the chuck is spaced-apart and substantially parallel to the surface of the chuck. Usually the material is deposited to form a plurality of pads, although any wafer spacing mask pattern deposited on the surface of the substrate support chuck may be used. Thus, the wafer spacing mask reduces the amount of contaminant particles that adhere to the underside of the wafer. Heretofore, there was not available a repeatable technique for fabricating such a wafer spacing mask.
Therefore, a need exists in the art for a method and apparatus for fabricating a wafer spacing mask.